Sachin Patkar
A Design Methodology for Folded, Pipelined Architectures in VLSI Applications using Projective Space Lattices.
Mon, 08/22/2011 - 15:01 — SomNambulAuthors: Hrishikesh Sharma, Sachin Patkar
Subjects: Architecture
AbstractSemi-parallel, or folded, VLSI architectures are used whenever hardware
resources need to be saved at design time. Most recent applications that are
based on Projective Geometry (PG) based balanced bipartite graph also fall in
this category. In this paper, we provide a high-level, top-down design
methodology to design optimal semi-parallel architectures for applications,
whose Data Flow Graph (DFG) is based on PG bipartite graph. Such applications
have been found e.g. in error-control coding and matrix computations.Finite Projective Geometry based Fast, Conflict-free Parallel Matrix Computations.
Thu, 07/07/2011 - 15:01 — SomNambulAuthors: Shreeniwas Sapre, Hrishikesh Sharma, Abhishek Patil, B. S. Adiga, Sachin Patkar
Subjects: Numerical Analysis
AbstractMatrix computations, especially iterative PDE solving (and the sparse matrix
vector multiplication subproblem within) using conjugate gradient algorithm,
and LU/Cholesky decomposition for solving system of linear equations, form the
kernel of many applications, such as circuit simulators, computational fluid
dynamics or structural analysis etc. The problem of designing approaches for
parallelizing these computations, to get good speedups as much as possible as
per Amdahl's law, has been continuously researched upon.
User login
