Security issues are playing dominant role in today's high speed communication
systems. A fast and compact FPGA based implementation of the Data Encryption
Standard (DES) and Triple DES algorithm is presented in this paper that is
widely used in cryptography for securing the Internet traffic in modern day
communication systems. The design of the digital cryptographic circuit was
implemented in a Vertex 5 series (XCVLX5110T) target device with the use of
VHDL as the hardware description language.